
PEL-2000 Programming Manual
166
Channel Summary Registers
8
3
4
2
2
1
1
0
128
7
64
6
32
5
16
4
Bit weight
Bit Position
EVENT
ENABLE
CH4 CH3 CH2 CH1CH8 CH7 CH6 CH5
CH4 CH3 CH2 CH1CH8 CH7 CH6 CH5
If an event has been enabled and set in the
Channel Status Registers, then the corresponding
channel bit will be set in the Channel Summary
Event Register. If the Event Register is read, it will
be cleared to 0.
The Enable Register is used to determine which
channel events will be used to set the CSUM bit of
the Status Byte Register.
Questionable Status
The Questionable Status Registers will show if any
faults or errors have occurred. The Questionable
Status Registers have the same events as the
Channel Status Registers.
Questionable Status Register
8
3
4
2
2
1
1
0
RV OP OV OC
Bit weight
Bit Position
Condition
RV OP OV OCPTR/NTR
RV OP OV OCEVENT
RV OP OV OCENABLE
7-15
0
0
0
0
UVP G/N OT
UVP G/N OT
UVP G/N OT
UVP G/N OT
6 5 4
64 32 16
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